1. Field of the Invention
This invention relates to a semiconductor structure and a method of fabricating the same. More particularly, this invention relates to a structure of a non-volatile memory cell and a method of fabricating the same.
2. Description of the Prior Art
A non-volatile memory provides the property of multiple entries, retrievals and erasures of data, and is able to retain the stored information even when the electrical power is off. As a result, non-volatile memory is widely used in personal computers and consumer electronic products.
The family of non-volatile memory includes the substrate/oxide/nitride/oxide/silicon (SONOS) memory. The silicon nitride layer in the oxide-nitride-oxide (ONO) composite layer serves as a charge trapping layer.
In the programming of a SONOS memory cell, hot electrons injected into the charge trapping layer are not evenly distributed in the entire charge trapping layer but localized in a certain region of the charge trapping layer. In the erasing of the SONOS memory cell, hot holes are injected into the charge trapping layer locally to eliminate the stored electrons. However, since the injection region of the hot holes is smaller than that of the hot electrons, the SONOS memory cell cannot be completely erased. Therefore, after multiple programming-erasing cycles, the performance of the memory cell is reduced and even errors may occur during the operation of the memory cell.